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55 lines
2.6 KiB
ArmAsm
55 lines
2.6 KiB
ArmAsm
.syntax unified @ See https://sourceware.org/binutils/docs/as/ARM_002dInstruction_002dSet.html
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.cpu cortex-m4
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.fpu softvfp
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.thumb
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@ The .global directive gives the symbols external linkage.
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@ For clarity, the fn OSAsm_ThreadSwitch is exported as TIM2_IRQHandler, so that the vector table
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@ in startup.s doesn't need to be modified.
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.global OSAsm_Start
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.set TIM2_IRQHandler, OSAsm_ThreadSwitch
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.global TIM2_IRQHandler
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.extern RunPt
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.extern SchedlTimer_ClearITFlag
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.extern OS_Scheduler
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.section .text.OSAsm_Start
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.type OSAsm_Start, %function
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OSAsm_Start:
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CPSID I @ disable interrupts
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LDR R0, =RunPt @ R0 = &RunPt; // TCB_t** R0 = &RunPt
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LDR R1, [R0] @ R1 = *R0; // TCB_t* R1 = RunPt
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LDR SP, [R1] @ SP = *R1; // uint32_t SP = *(RunPt.sp)
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@ now we switched to the thread's stack, which we populated before
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POP {R4-R11} @ pop regs R4-R11
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POP {R0-R3} @ pop regs R0-R3
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POP {R12} @ pop reg R12
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POP {LR} @ discard LR
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POP {LR} @ pop PC to the link register (start location)
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POP {R1} @ discard PSR
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CPSIE I @ enable interrupts
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BX LR @ start first thread
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.section .text.OSAsm_ThreadSwitch
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.type OSAsm_ThreadSwitch, %function
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OSAsm_ThreadSwitch:
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@ save R0-R3,R12,LR,PC,PSR
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CPSID I @ prevent interrupt during context-switch
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PUSH {R4-R11} @ save remaining regs R4-R11
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LDR R0, =RunPt @ R0 = &RunPt; // TCB_t** R0 = &RunPt
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LDR R1, [R0] @ R1 = *R0; // TCB_t* R1 = RunPt
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STR SP, [R1] @ *R1 = SP; // *(RunPt.sp) = SP
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PUSH {R0, LR} @ push R0 and LR, so that fn calls don't loose them
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BL SchedlTimer_ClearITFlag @ clear SchedlTimer interrupt flag
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BL OS_Scheduler @ call OS_Scheduler, RunPt is updated
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POP {R0, LR} @ restore R0 and LR
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LDR R1, [R0] @ R1 = *R0; // TCB_t* R1 = RunPt
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LDR SP, [R1] @ SP = *R1; // uint32_t SP = *(RunPt.sp)
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@ now we switched to the new thread's stack
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POP {R4-R11} @ restore regs R4-R11
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CPSIE I @ tasks run with interrupts enabled
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BX LR @ restore R0-R3,R12,LR,PC,PSR
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